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Designing with FPGA’s

COURSE: Designing with FPGA’s

Code: ФЕИТ05019

ECTS points: 6 ECTS

Number of classes per week: 3+0+0+3

Lecturer: prof. Katerina Raleva

Subject of the course content: Introduction to programmable logic. PLD, CPLD and FPGA architectures. Introduction to hardware description languages. VHDL entities and architectures. VHDL constructs for combinational and synchronous logic. State-machine design and VHDL hierarchical design. Simulation, functions and procedures in VHDL. Synthesis and design implementation. Data flow optimization. Test-bench creation. High level design. Hardware-software co-design. Practical project with FPGA.

Literature:

  1. Ian Grout, Digital Systems Design with FPGAs and CPLDs, Elsevier Ltd. 2000
  2. Steve Kilts, Advanced FPGA Design, John Wiley & Sons, 2007
  3. Kevin Skahill, VHDL for Programmable Logic, Addison-Wesley, 1998