PLD and FPGA components
Course title: PLD and FPGA components
Code: FEIT05Z029
Number of credits (ECTS): 6
Weekly number of classes: 3+1+1+0
Prerequisite for enrollment of the subject: None
Course goals/Competences: To understand the concept of programmable logic devices. To have knowledge on digital design using VHDL.
Total available number of classes: 180
Curriculum: Internal structure of programmable logic devices: SPLD (PLA, PAL/GAL), CPLD and FPGA. Hardware description languages. Simulation versus syntesis. VHDL basic structure: entity and architecture. Port types and data types. Signals and variables. Operators and attributes. Concurrent statements. Processes (sensitivity list). Designing finite state machine using VHDL. Functions and procedures.
Literature:
Literature |
||||
Compulsory literature |
||||
No. |
Author |
Title |
Publisher |
Year |
1 |
V. A. Pedroni |
Circuit Design with VHDL |
MIT Press |
2004 |
2 |
Frank Vahid |
Digital Design |
John Wiley |
2007 |
Further literature |
||||
No. |
Author |
Title |
Publisher |
Year |
1 |
Ion Grout |
Digital Systems Design with FPGAs |
Elsevier, Newnes |
2008 |