System Design using HDL
Course title: System Design using HDL
Code: FEIT07Z020
Number of credits (ECTS): 6
Weekly number of classes: 2+2+1+0
Prerequisite for enrollment of the subject: None
Course goals/Competences: Mastering techniques and principles for digital systems design using hardware description languages. Learning techniques for improving the performance and accuracy of simulations. Examining the problems of synthesis.
Total available number of classes: 180
Curriculum: Designing digital systems using hardware description languages (HDL). Using software platforms for simulation, testing and synthesis of digital systems. Creating IP-cores in HDL. Using IP-cores as building blocks for fabricating complex digital systems. Designing system-on-chip with HDL. Describing processors in HDL. Describing buses in HDL.
Literature:
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Literature |
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Compulsory literature |
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No. |
Author |
Title |
Publisher |
Year |
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1 |
Z. Navabi |
VHDL:Modular Design and Synthesis of Cores and Systems, 3rd Edition |
McGraw-Hill Professional |
2007 |
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2 |
M. Zwolinski |
Digital System Design with VHDL, 2nd Edition |
Prentice Hall |
2004 |
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3 |
P.P. Chu |
RTL Hardware Design Using VHDL: Coding for Efficiency, Portability, and Scalability |
Wiley-IEEE Press |
2006 |
